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(Science Daily)   New MeRAM is like SDRAM except faster, more efficient, smaller, and considerably more selfish   (sciencedaily.com) divider line 39
    More: Spiffy, SDRAM, high density, magnets, flash memory, memories, research program, electric currents, electric fields  
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4614 clicks; posted to Geek » on 16 Dec 2012 at 9:12 PM (1 year ago)   |  Favorite    |   share:  Share on Twitter share via Email Share on Facebook   more»



39 Comments   (+0 »)
   
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2012-12-16 08:02:07 PM
oh subby
I see what you did there.
LOL
 
2012-12-16 08:18:14 PM
I'll wait for XPRAM.
 
2012-12-16 08:56:03 PM
Meh

Not as funny as you think this headline is
 
2012-12-16 09:17:38 PM
There is no "I" in MeRAM.
 
2012-12-16 09:20:54 PM
Never hear of it .. yet. Very funny. Many future jokes to be made, but the only ones that are funny end today.
 
2012-12-16 09:27:10 PM
In no way does the article attempt to compare MRAM to SDRAM.
Which means what exactly? No idea. I doubt it will ever be a competitor to DDR5 ballpack.
 
2012-12-16 09:28:46 PM

cman: Meh

Not as funny as you think this headline is


No, you aren't.
 
2012-12-16 09:30:39 PM
s3.vidimg.popscreen.com 

I see what you did there, Smitty
 
2012-12-16 09:33:29 PM
Bah, MeRAM. You?
 
2012-12-16 09:33:38 PM
cdn2.screenjunkies.com

10 Dollah!
 
2012-12-16 09:46:02 PM
"...using electric voltage instead of a flowing electric current..."

Before I go with the 'Morbo: Electronics do not work that way.' someone willing to 'splain in simple words what they actually mean?
 
2012-12-16 09:54:03 PM

DigitalCoffee: "...using electric voltage instead of a flowing electric current..."

Before I go with the 'Morbo: Electronics do not work that way.' someone willing to 'splain in simple words what they actually mean?


Best guess, by changing voltage on one side of a magnet, you can turn it into a 0 or 1. Since no current is moving across a transistor, it uses less energy.
The whole concept almost sounds like a capacitor type circuit, but with a magnet in between the anode and cathode.
 
2012-12-16 09:59:02 PM
Too bad it requires Windows Me.
 
2012-12-16 10:10:06 PM

ajgeek: DigitalCoffee: "...using electric voltage instead of a flowing electric current..."

Before I go with the 'Morbo: Electronics do not work that way.' someone willing to 'splain in simple words what they actually mean?

Best guess, by changing voltage on one side of a magnet, you can turn it into a 0 or 1. Since no current is moving across a transistor, it uses less energy.
The whole concept almost sounds like a capacitor type circuit, but with a magnet in between the anode and cathode.


If the magnetic nano-particle sustains a charge, it isn't necessary to push current through it, you can simply use voltage to repel the spin. Interestingly this in theory could actually reduces the number of "components" per bit of memory.

Since they're looking at semivolatile ram instead of SRAM solutions, its not crucial that the retention in "cold state" be perfect. They just want something that will hold info longer than three ten thousandths of a second. What they want is a ram type that can be used in situations where a device need not power-up and power-down but still have much higher ram speeds than low voltage SRAM. This allows such "MeRAM" to be paired with burst process devices like medical transponders, burst processing scientific equipment and - as indicated - cellular communications gear. If you can consume a fraction of the power in standby but gain speeds in the range of SDRAM it would greatly extend the battery efficiency of most of our cellular and portability devices. This in turn could save pollution and increase the utility of any given pound of batteries in the field.

Its a lot to think about!

Honestly I've never been overly concerned about the heat generated by my ram. I make sure it isn't an issue but only in extreme circumstances does ram generate comparatively large amounts of heat. Heat spreaders operate to ensure that all the ram is at approximately the same temperature so its operational profile is nominal, they're not air dispersal sinks.

I DO own two ram fans on my i3960x but that's mostly because there's no real circulation around the CPU since I use an h100i.
Replacing air sinks with a water system incurs the wrath of the gods of Power Regulation... you gotta have fans.
 
2012-12-16 10:13:13 PM
I like this part

The low bit capacity, in turn, translates into a relatively large cost per bit, limiting STT's range of applications.

followed in the next paragraph by this

And the memory can be more than five-times as dense, with more bits of information stored in the same physical area, which also brings down the cost per bit.

I understand what they mean, but they could be more clear. Your average half-literate computer user might not be sure what conclusion to draw. The first should read -

The lower bit capacity, in turn, translates into a relatively large cost per bit relative to existing HD storage technologies, limiting STT's range of applications.

...and the second should read -

And the memory can be more than five-times denser than today's RAM, with more bits of information stored in the same physical area, which also brings down the cost per bit relative to existing RAM technologies.

They have other issues in this article too -

"Yet while STT is superior in many respects to competing memory technologies, its electric current-based write mechanism still requires a certain amount of power, which means that it generates heat when data is written into it"

Umm yeah. This is true for EVERY memory technology. Due to the fact that this uses less power than others, it also produces less heat. Wattage is not actually a measurement of electric usage, but of heat generation(which is a result of using the electricity). Is the author of this article completely unacquainted with the laws of thermodynamics?

That said, I'm pretty exited about a technology may make the concept of RAM and persistent storage being separate components to an end. Imagine that as much of your HD that was not filled with permanently stored items... you have that much available RAM! For as long as there have been computers, the amount of RAM has been a major limiting factor in what it can do. With this, RAM becomes a non-issue for all but the most demanding of scientific simulations.
 
2012-12-16 10:16:29 PM
Bring back the hamster in a wheel!
 
2012-12-16 10:30:17 PM

bk3k: For as long as there have been computers, the amount of RAM has been a major limiting factor in what it can do. With this, RAM becomes a non-issue for all but the most demanding of scientific simulations.


Actually, the communication between the processor and the rest of the computer is the limiting factor. The processor's memory is an order of magnitude faster than RAM. Years ago they compared computer processors to butlers saying that processors get their work done so fast that even for heavy users it was like having a butler and only asking him to do the day's dishes once a year.
 
2012-12-16 10:34:38 PM

StrikitRich:
I see what you did there, Smitty


Wow, haven't heard that term in a while...
 
2012-12-16 10:38:01 PM

Snarcoleptic_Hoosier: Bring back the hamster in a wheel!


CHALLENGE ACCEPTED

rowanheal.com
 
2012-12-16 10:40:33 PM

ajgeek: DigitalCoffee: "...using electric voltage instead of a flowing electric current..."

Before I go with the 'Morbo: Electronics do not work that way.' someone willing to 'splain in simple words what they actually mean?

Best guess, by changing voltage on one side of a magnet, you can turn it into a 0 or 1. Since no current is moving across a transistor, it uses less energy.
The whole concept almost sounds like a capacitor type circuit, but with a magnet in between the anode and cathode.


One of the big problems with (S)DRAM now is that because of annoying characteristics of those very small components, bits do not hold their value for very long, prompting a sizable amount of the total power to be consumed by reading and re-writing stale bits. (Reads also disturb the current values, so every time you want to look at information in memory, you must write it back to the same spot, or lose it).

Hopefully, the electromagnets will both hold a values much longer, allow non-destructive reads, which would eliminate the need to constantly refresh information just to preserve what's already there.
 
2012-12-16 11:09:50 PM

finnished: StrikitRich:
I see what you did there, Smitty

Wow, haven't heard that term in a while...


Smitty?
 
2012-12-16 11:32:42 PM

freidog: (S)DRAM


Thank you!

At the circuit design level there is SRAM and DRAM. If you go around calling it SDRAM no one except memory interface designers are going to know what you're talking about.

Tobin_Lam: Actually, the communication between the processor and the rest of the computer is the limiting factor.


This is *the* major bottleneck on modern computing systems. So much so that many people are making good careers for themselves (especially in the high performance / parallel / distributed computing worlds) simply by developing algorithms that minimize communication even if they are asymptotically slower or have larger constant factors for runtime. People look at this at every level of communication in the system. First, how algorithmically minimize cache access (and in the case of parallel computing, cache coherence invalidations). Given that, how to minimize cache footprint to keep the entire computation within the cache. There are people looking at how to work with SSDs most efficiently, but not a lot going on other than that just because RAM is so cheap these days that it makes more sense to just buy more in the event that your computation doesn't fit in memory.

This is such a bottleneck on modern computing systems that it has a name: the memory gap (or the memory wall), and it refers to the fact that processors get faster more quickly than memory gets faster, so every year memory performs worse (relatively). Intel's Sandy Bridge architecture takes 3 clock cycles to access the L1 cache, 8 clock cycles to access the L2 cache, 26-31 cycles to access the L3 cache, If you happen to have really good ram and can access data in 30ns, that's still 105 cycles if your processor is running at 3.5Ghz, but your access time is likely something more like 50ns (or 175 cycles).

A lot of modern computer features are directly or indirectly designed to mitigate this problem- things like hyper-threading (which helps to hide load latencies) and larger data pipes (so more data can be fetched/prefetched in the same amount of time).
 
2012-12-16 11:36:01 PM
Sexual Disease Ram vs. Me Ram. Hmmm, interesting.
 
2012-12-16 11:40:40 PM

DigitalCoffee: "...using electric voltage instead of a flowing electric current..."

Before I go with the 'Morbo: Electronics do not work that way.' someone willing to 'splain in simple words what they actually mean?


So, you understand the difference between voltage and current, yeah? Good, I didn't want to start at electronics 101 . .

Let's jump to transistors. Some are current switched, others are voltage switched. Still with us?

So, current magnetic memory requires a non-trivial current to pass to switch the state of the bit, that means that there is heat wasted. This new memory just requires that the voltage be changed enough; who cares if you need to get the volts up at 12v or 300v if you can keep the current down. Total energy through the circuit (watts) is lower, and that means less heat loss. To just make up numbers, let's say the old stuff needs 100mA at anything over 3v (300mW), while the new just requires any current at 100V (even 1mA would be 100mW and that current could potentially be dropped much lower).
 
2012-12-17 12:12:29 AM
"Ignore bk3k, we taught him computers wrong as a joke."

/line from Fark Pow, Enter the Pissed.


At no time in the article did they compare any magnetic ram to SDRAM, certainly not to triple-read-per-clock DDR3 SDRAM.
 
2012-12-17 12:16:23 AM
Perhaps they could organize the magnets into domains or "bubbles".
 
2012-12-17 12:35:21 AM
Isn't state retention without power an unwanted feature for a system using encryption? If an adversary attempts to seize your machine you want an easy way to flush the key, and this pretty much eliminates the current recourse.
 
2012-12-17 04:46:43 AM
this sounds like a modern version of core memory. They've been talking about it for years but I doubt anything will come of it. It's another vaporware situation.

/IT'S COMING SOON!
//In a few more years

/// 2 years later...

////ITS STILL COMING!!
 
2012-12-17 05:12:56 AM
Rambus lawsuit in 3..2..1..
 
2012-12-17 05:44:24 AM

Tobin_Lam: Actually, the communication between the processor and the rest of the computer is the limiting factor. The processor's memory is an order of magnitude faster than RAM. Years ago they compared computer processors to butlers saying that processors get their work done so fast that even for heavy users it was like having a butler and only asking him to do the day's dishes once a year.


I'm speaking of RAM in terms of how much data you can hold and process - not in terms of speed. Perhaps you where not using a computer when you could not use more than 640k LOL. Ah the not-so-good old days.

prjindigo: "Ignore bk3k, we taught him computers wrong as a joke."

/line from Fark Pow, Enter the Pissed.


At no time in the article did they compare any magnetic ram to SDRAM, certainly not to triple-read-per-clock DDR3 SDRAM.

RTFA better...

At the very top of TFA - magnetoresistive random access memory so yes this is a competing technology. Even if you didn't recognize the magnetoresistive part, Random Access Memory (aka RAM) should have struck you if you knew the slightest thing about computer hardware as you imply. And what they are describing would be leaps faster than the way your DDR3 SDRAM operates. 

At a minimum, each bit of your SDRAM needs a transistor to control access to a capacitor. Also the capacitors need recharged every few milliseconds. That actually means the memory controller must read and rewrite the charge every on every bit thousands of times per second. During that time the memory cell can't really be used.

By contrast these magnetoresistive cells will "flip" based of the voltage being present - not really requiring current flow to "charge them." They won't need refreshed either. So they flip faster than a capacitor can charge, and won't discharge when read from. Setting them actually will change their resistance value, so simply reading the resistance will tell you if it is a 1 or 0. This will not change even if power is removed. So they are also non-volatile and don't degrade over time like Flash Memory does

These should be much faster than transistor/capacitor based memory.  The first link I gave explains the concept a bit better than TFA does - although that link is about 4 years out of date.

In terms of speed - these can be classed with SRAM which you might know as CPU cache. But these cells are much smaller as SRAM requires a minimum of 4 transistors(but no capacitors) per cell. Also SRAM is requires constant power to maintain state - meaning it is volatile, less power efficient, and produces more heat (which is not terribly desirable on a processor die). So this also offers a way to expand cache amounts while cutting head generation but without loosing performance.

Just so you can visualize this though - If you imagined electrical flow in plumping terms - Voltage would be compared to water pressure, where as amperage would be compared to actual water flow. Capacitors need to fill up(be written to), requiring flow. Also they are very leaky. Where as these magnetoresistive cells are set by "pressure" itself. 

Did TFA explain all this to you? No. This article is a failure. But you are a failure for complete inability to read even the limited information they provided.
 
2012-12-17 05:48:26 AM

viscountalpha: this sounds like a modern version of core memory. They've been talking about it for years but I doubt anything will come of it. It's another vaporware situation.

/IT'S COMING SOON!
//In a few more years

/// 2 years later...

////ITS STILL COMING!!


Exept DARPA is backing this one. Maybe you missed that in the article(and references to this can be found elsewhere if you research this). I would bet on it coming to pass.
 
2012-12-17 07:26:46 AM

StrikitRich: finnished: StrikitRich:
I see what you did there, Smitty

Wow, haven't heard that term in a while...

Smitty?


Yeah, that was the thing some years back, now it's just boring Subby.
 
2012-12-17 08:49:05 AM

finnished: StrikitRich: finnished: StrikitRich:
I see what you did there, Smitty

Wow, haven't heard that term in a while...

Smitty?

Yeah, that was the thing some years back, now it's just boring Subby.


I remember the last time I used Smitty someone angrily corrected the spelling..
 
2012-12-17 09:09:50 AM
I'm still partial to Signetic's WOM (datasheet^).
 
2012-12-17 11:39:59 AM

bk3k: Also SRAM is requires constant power to maintain state - meaning it is volatile, less power efficient, and produces more heat (which is not terribly desirable on a processor die). So this also offers a way to expand cache amounts while cutting head generation but without loosing performance.


This is wrong, actually. The amount of current needed to keep an SRAM cell alive is very small. Except in cases where you're constantly accessing memory, SRAM takes considerably less power than DRAM. This makes it very desirable for embedded devices where battery life is important, and if you look at the market for current SRAM technologies this is where A LOT of it goes. Because of this, SRAM also generates much less heat than DRAM does.

As you pointed out yourself, SRAM cells are just comprised of transistors. Hence, the power consumption is just a function of the active current and the leak current, which is itself a function of the transistor construction (like any other transistor-based structure on the chip). Hence some SRAM *can* be power hungry, but the large majority of it is not.

Also, SRAM is used in CPU caches because it can be accessed much quicker than DRAM and because an individual SRAM cell is much smaller than an individual DRAM cell (which yields higher densities), not because of it's power consumption or heat generation. This is because die area on chips is extremely limited and whole point of a CPU cache is to be as fast as possible, hence SRAM.
 
2012-12-17 12:39:26 PM
Supposedly, it is either shipping or in production. Difficulty: in 64M ram sticks. That said, if you need a really fast flash replacement (and can live with 64M), Bobs your uncle.

http://www.computerworld.com/s/article/9233516/Everspin_ships_first_S T _MRAM_memory_with_500X_performance_of_flash
 
2012-12-17 12:57:31 PM

yet_another_wumpus: Supposedly, it is either shipping or in production. Difficulty: in 64M ram sticks. That said, if you need a really fast flash replacement (and can live with 64M), Bobs your uncle.

http://www.computerworld.com/s/article/9233516/Everspin_ships_first_S T _MRAM_memory_with_500X_performance_of_flash


While that is great news and I already know of several embedded products we could use this MRAM in, I believe the MeRAM The Fine Article is talking about an improved version that bumps density and decimates power consumption and is still very much vaporware (R&D stage at best).
 
2012-12-17 03:07:17 PM

LordOfThePings: Bah, MeRAM. You?


That'll do, Ping.
 
2012-12-18 12:03:55 AM

Fubini: This is wrong, actually. The amount of current needed to keep an SRAM cell alive is very small.


So I say SRAM requires constant power to maintain state(where as MeRAM does not), and you reply that it uses less power than DRAM. Which is fine, except you also replied that I am wrong. So nothing you stated leads to me being wrong.

This product does NOT require constant power to maintain state. The power usage is lower than SRAM as well. This memory
 
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